On Tue, Oct 13, 2020 at 11:19:33AM -0500, Mark Nelson wrote:
Thanks for the link Alwin!
On intel platforms disabling C/P state transitions can have a really big impact on IOPS (on RHEL for instance using the network or performance latency tuned profile). It would be very interesting to know if AMD EPYC platforms see similar benefits. I don't have any in house, but if you happen to have a chance it would be an interesting addendum to your report. Thanks for the suggestion. I indeed did a run before disabling the C/P states in the BIOS. But unfortunately I didn't keep the results. :/
As far as I remember though, there was a visible improvement after disabling them. I will have a look, once I have some time to do some more benchmarks. -- Cheers, Alwin